Select pages from below
Get latest updates at your E-mail

Sunday 20 March 2016

How we can design a low power AND gate CMOS design In Tanner tool :-


In this video we show that how we can design a low power based And gate CMOS design . In this we use only two number of transistor . In the normal AND gate CMOS design we have to use at least 6 number of transistor. GDI (gate Diffusion Input) technique will be able to reduce the total number of transistor and power consumption of the circuit .
See full video :-